For some spacecraft manufacturers, the use of commercial off-the-shelf (COTS) parts is the only option to meet the performance and cost needs of a mission. For many satellite OEMs, the price and long lead-times of fully-qualified components is simply unaffordable. Today, many COTS devices are operating successfully in-orbit and this article discusses their use and selection for space applications.
CMOS scaling, epitaxial fabrication, the use of shallow trench isolation, TMR HDL coding, SEU fault injection and sensitivity classification of the configuration bitstream has allowed some ultra deep-submicron, SRAM-based COTS FPGAs to be used for three to five-year LEO missions. During system development, single and multi-bit errors can be randomly or strategically introduced to characterise potential SEFI behaviour, allowing you to understand the impact of changes to device configuration, plan a system-recovery response and improve the soft-error rate.
Today, several COTS flash-based FPGAs are operating successfully on-board satellites with users adding EDAC and TMR to increase overall reliability. Their configuration memory is SEU immune and devices can be re-programmed in-orbit.
The successful use of COTS components must be an integrated part of your complete design process: from initial parts selection, the assessment of their suitability for use in space, how devices are handled and stored once they arrive in Goods-In, worst-case and reliability analysis, testing and an approach to hardware design which reflects system reliability, e.g. prototyping early in the development cycle and burn-in to ‘weed out’ infant mortality failures allowing the use of more reliable components in their normal operating phase.
To achieve mission reliability, the location of COTS parts and sub-systems within the overall build is important and spacecraft modelling software such as FASTRAD can help identify areas of the satellite structure that can offer improved levels of shielding from radiation and OMERE can be freely downloaded to predict the space environment for your mission. When using COTS components, it’s not devices which are being qualified, but an assurance of your total engineering philosophy!
The selection of a COTS part is as much about how a component is used as the individual device itself. For example, Spacechips is currently using very successfully a fully-qualified, un-hardened DAC for fifteen year missions which was never intended for satellite applications. The fabrication technology is BiCMOS, in fact, SiGe bipolar and SOI CMOS. From a semiconductor process radiation hardness perspective, that’s a good start! The supplier told that they suspected the section of the micro-architecture which synchronises the in-coming digital data was soft and I recently de-risked the DAC avoiding this timing path and using another. The outcome is that the maximum sampling speed for space applications is less than that available for commercial users, but still high enough to satisfy satellite customers to date. As part of component selection and risk assessment, using a COTS in this way is acceptable!
Similarly, Spacechips was recently asked to evaluate a COTS BiCMOS ADC which has a fully bipolar digitiser and bulk-CMOS configuration logic. As part of the risk assessment, the main concern wasF at the potential softness of the unhardened configuration circuitry. Radiation testing confirmed that this logic continuously resets (multiple SEFIs) making the device unusable.
Today, the commercial versions of some space-grade components contain the same die as fully-qualified parts, or have slightly different silicon, but are still fabricated on the same hardened process. This information isn’t always publicly shared by suppliers and Spacechips keeps a database of such parts to help satellite OEMs select low-cost COTS devices. The number of requests received has quadrupled in the last eighteen months especially from manufacturers of ‘New Space’ LEO constellations.
Most COTS parts have a plastic package which can outgas volatile materials that condense onto sensors, radiators and solar cells. Offgassing is exacerbated in the vacuum of outer space and this risk needs to be assessed of an individual mission basis. Placing the parts in a sealed (hermetic) box is one solution to limit outgassing.
Some silicon vendors offer an Enhanced Plastic option which are parts assured over an extended temperature range, e.g. from -55 to +125°C, where testing and characterisation accounts for glass transition effects and thermal expansion coefficients. Components can also be batch managed and typically assembled using a controlled baseline, i.e. no variation between foundries, lots and wafers, all of which can potentially modify the hardness of parts.
The above safeguards and improved traceability are very good for the space industry as changes to the fabrication technology and/or die shrink have been known to alter the radiation hardness of COTS parts. The Enhanced Plastic option differs between silicon vendors and it’s important that you check with your supplier as to what assurances are being offered? Many manufacturers will not guarantee the use of their COTS components for space applications nor accept any liability.
Another option for you to consider is that some suppliers can up-screen COTS parts to a higher level of reliability and offer QCOTS or COTS+ components. Additional tests are carried out to address known failure mechanisms for plastic parts to identify and eliminate rejects. Recent discussions with some traditional semiconductor vendors suggest they will consider requests on a case-by-case basis and there may be some MOQ requirements. Likewise for users, there are costs associated with each assessment and a typical up-screening flow can include DPA, temperature cycling as well as tests for humidity, burn-in, electrical functionality, ESD, outgassing and C-SAM to check for delamination. Formal standards such as Mil-Std 883, JESD-22/26 and MIL-PRF 55365 exist for these, and some are carried out on the complete lot whereas destructive tests such as radiation testing are performed on a small sample.
Compared to fully-qualified parts, using and selecting COTS components requires careful risk assessment and their operation and/or specification may have to be modified or de-rated to meet your mission’s reliability needs. When using COTS components, it’s not devices which are being qualified, but an assurance of your total engineering approach! Analyses increase reliability, mission success and gives confidence that the design will deliver the required performance up to end-of-life. e.g. worst-case and parts FMEA, FMECA and MTBF. Functional, EMC and environmental testing complements analyses. When using an approach to hardware design which reflects system reliability, it is possible to successfully deliver space electronics at significantly lower cost with shorter lead times. Circuit failures are one of the largest causes of mission failure with nearly 50% of insurance claims related to the electrical power system. Design assurance typically represents less than 5% of the total spacecraft cost, whereas insurance premiums can account for up to 33%. Formal standards exist for analyses and testing, e.g. TOR, ECSS and Mil-Std.
Dr. Rajan Bedi is the CEO and founder of Spacechips, which provides ultra high-throughput, on-board processing and transponder products for telecommunication, Earth-Observation, satellite-based internet and M2M/IoT satellites. The company also offers design consultancy, technical-marketing, business-intelligence and training services (www.spacechips.co.uk).
Spacechips’ Design-Consultancy Services help clients around the world develop local capability and expertise, advising customers how to use and select the right components, how to design, test, assemble and manufacture space electronics. The company also designs and delivers bespoke satellite/spacecraft electronics and will be teaching courses on Space Electronics in Australia in 2020: (http://spacechips.co.uk/Training_services.html). Email email@example.com for further information.